Low temperature wafer-level bonding for hermetic packaging of 3D microsystems

Metallic copper–copper (Cu–Cu) thermo-compression bonding, oxide–oxide (SiO 2 –SiO 2 ) fusion bonding and silicon–silicon (Si–Si) direct bonding are investigated for potential application as hermetic seal in 3D microsystem packaging. Cavities are etched to a volume of 1.4 × 10 −3 cm 3 in accordance with the MIL-STD-883E standard prescribed for microelectronics packaging. In the case of metal bonding, a clean Cu layer with a thickness of 300 nm and a Ti barrier layer with an underlying thickness of 50 nm are used. The wafer pair is bonded at 300 °C under the application of a bonding force of 5500 N for 1 h. On the other hand, Si–Si bonding and SiO 2 –SiO 2 bonding are initiated at room ambient after surface activation, followed by annealing in inert ambient at 300 °C for 1 h. The bonded cavities are stored in a helium bomb chamber and the leak rate is measured with a mass spectrometer. An excellent helium leak rate below 5 × 10 −9 atm cm 3 s −1 is detected for all cases and this is at least ten times better than the reject limit.