Key result
A symmetric multiprocessor architecture based on STMicroelectronics VLIW DSPs successfully processed full 12-lead ECG signals in real time without failures, improving upon state-of-the-art SoC designs.
A novel multiprocessor system-on-chip architecture enables real-time, failure-free analysis of 12-lead ECG signals for continuous biomedical monitoring.
May enable continuous real-time ECG monitoring in devices; leaves open clinical validation before practice adoption.
In this article we focus on multiprocessor system-on-chip (MPSoC) architectures for human heart electrocardiogram (ECG) real time analysis as a hardware/software (HW/SW) platform offering an advance relative to state-of-the-art solutions. This is a relevant biomedical application with good potential market, since heart diseases are responsible for the largest number of yearly deaths. Hence, it is a good target for an application-specific system-on-chip (SoC) and HW/SW codesign. We investigate a symmetric multiprocessor architecture based on STMicroelectronics VLIW DSPs that process in real time 12-lead ECG signals. This architecture improves upon state-of-the-art SoC designs for ECG analysis in its ability to analyze the full 12 leads in real time, even with high sampling frequencies, and its ability to detect heart malfunction for the whole ECG signal interval. We explore the design space by considering a number of hardware and software architectural options. Comparing our design with present-day solutions from an SoC and application point-of-view shows that our platform can be used in real time and without failures.
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Khatib et al. (2008) studied Heart diseases (ECG analysis). Multiprocessor system-on-chip (MPSoC) architecture based on STMicroelectronics VLIW DSPs vs. State-of-the-art SoC designs was evaluated on Real-time processing of 12-lead ECG signals and detection of heart malfunction. A symmetric multiprocessor architecture based on STMicroelectronics VLIW DSPs successfully processed full 12-lead ECG signals in real time without failures, improving upon state-of-the-art SoC designs.
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