Two states phenomenon in the current behavior of metal-oxide-semiconductor capacitor structure with ultra-thin SiO2

Two-state gate current characteristic of the metal-oxide-semiconductor capacitor structure, after the electrical treatments of negative/positive voltage stressing for sufficient time, is investigated. High and low two current states can be achieved with the electron trapping/de-trapping in the device edge after the treatments. There is imperceptible electron trapping with a current variation ratio of δI/I0 = −0.86% at −2 V. Under this condition, it results in the apparent current difference (>2 orders of magnitude) between the two current states at VG > 0. The mechanism of the current affected by Schottky barrier height of the holes is proposed for this observed phenomenon.