Area Efficient Full Subtractor Design for Quantum-Dot Cellular Automata

QCA technology represents a disruptive nanoelectronics paradigm characterized by its terahertz speed, reduced energy consumption, and potential for very high device density. Full subtractors play a crucial role in the Digital Signal Processing (DSP) systems for arithmetic operations and binary data manipulation. This article proposes a dedicated QCA Full-Subtractor (QFS) design to leverage electrostatic intercellular interaction. The proposed QFS design does not utilize any majority gate, greatly diminishing the cell count, required area, and performance. This novel design requires only 15 QCA cells with 7644.00 nm2 area and 0.5 latency. Functional validation and energy calculations are evaluated using the tool QCA Designer-E.