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A sub-terahertz frequency doubler with signal modulation is proposed and analyzed in this letter. An 85 GHz input signal is modulated by a differential pair, and a push-push frequency doubler with capacitive degeneration technique is designed to obtain the 170 GHz modulated output signal. Via the use of negative impedance to eliminate the leakage current of transistors, the proposed enhanced push-push frequency doubler achieves a power efficiency of 8.5% and a maximum output power of 4.5 dBm at 170 GHz without applying a modulation signal. The 0.13 μm SiGe BiCMOS process is used to fabricate the proposed design and the total chip area is 0.75 × 0.8 mm2.
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Li et al. (2015) studied this question.
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