A temperature correction methodology for in-situ darkI-V(DIV) characterization of conventional p-type crystalline silicon photovoltaic (PV) modules undergoing potential-induced degradation (PID) is proposed. We observe that the DIV-derived module power temperature coefficient (γdark) varies as a function of the extent of PID. To investigate the relationship between γdarkand DIV-derived module power (Pdark(Ts), measured in situ and at the stress temperature) two parameters are defined: change in the DIV-derived module temperature coefficient (Δγdark) and DIV-derived module power degradation at the PID stress temperature (ΔPdark(Ts)). It is determined that there is a linear relationship between Δγdarkand ΔPdark(Ts). Based on this finding, we can easily determine the module γdark at various stages of PID by monitoring Pdark(Ts) in situ. We then further develop a mathematical model to translate Pdark(Ts) to that at 25 °C (Pdark (25 °C)), which is correlated with the module power measured at the standard testing conditions (PST C). Our experiments demonstrate that, for various degrees of PID, the temperature correction methodology offers a relative accuracy of ±3% for predicting PST C. Furthermore, it reduces the root-mean-square error (RMSE) by around 70%, compared with the PSTC estimation without the temperature correction.
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Luo et al. (2016) studied this question.
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