A comprehensive analysis on progressive reset transitions in RRAMs

Reset processes in resistive random-access memory devices have been studied in depth. In particular, progressive transitions, where no clear current reduction steps are seen, are analysed by using a previously developed simulator and by comparing with experimental data of devices based on HfO 2 oxides. It has been reported that the characterization of progressive reset processes can be performed by separately considering devices with a single conductive filament or devices with more than one conductive filament. In addition, making use of the experimental measurements shown, different numerical methods are proposed to extract the reset voltage. These methods are applied to different I – V reset curves and discussed.