This paper describes a rigorous and systematic procedure to derive a non‐linear distributed FET model that can easily be implemented in CAD routines of simulators based on harmonic balance techniques. The new model is derived from a knowledge of the conventional linear lumped equivalent circuit, from non‐linear current sources extracted from pulsed measurements, and from the physical dimensions of the FET. For fundamental and harmonic frequencies, the FET is modelled byNidentical cells. Each cell is made up of a non‐linear two‐port section inserted between two linear four‐port sections that simulate the coupling and the distributed effects along the electrodes of the FET in the width direction only. This non‐linear distributed scaling approach to FET modelling has been applied to the analysis of a submicrometre‐gate GaAs FET at millimetre‐wave frequencies, and the results were compared with the non‐linear lumped element approach. This approach can be applied to other transistors used in non‐linear regions at microwave and millimetre‐wave frequencies.
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Ongareau et al. (1993) studied this question.
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