On the Capacitance of Nanosheet Transistors

This is the authors' abstract. We don't add key points for this paper.

The capacitance of the gate oxide is a crucial parameter to model the performance of MOSFETs. The traditional expression used to compute it stems from the parallel-plate capacitor formula. While its use is appropriate for planar devices, it has been naturally extended to 3-D devices such as those based on nanosheets even if the geometry is quite different. In this work, we compute numerically the gate oxide capacitance of nanosheet transistors and, observing a nonnegligible discrepancy with the planar model, we propose a simple model that better reproduces the computed capacitance. Then, we investigate the definition of equivalent oxide thickness (EOT), showing that it cannot be strictly used for nonplanar devices: however, our improved model allows us to obtain a useful expression valid for the most common cases. Finally, we generalize the capacitance model to nanosheets with rounded corners.