SAR ADC architecture with 98% reduction in switching energy over conventional scheme

A high energy‐efficiency switching scheme for a successive approximation register (SAR) analogue‐to‐digital converter (ADC) is presented. The proposed method can achieve 98.4% savings in switching energy when compared to a conventional SAR. The proposed technique also achieves a 4 × reduction in total capacitance used in the digital‐to‐analogue converter (DAC) compared to the conventional DAC.