Low Power Design Methodologies

With the demand of addition of more and more system on chip, the number of transistors are getting added which leads to the increase in power dissipation in the devices.Recently, due to the continuous scaling of feature size, a massive development has been taken place in the field of portable devices.Two main features of low power design are battery lifeline (especially in portable devices) and reliability Present electronics market is full of battery operated highly complex gadgets and multifunctional portable devices.The power consumption in these devices has become the pivotal constraint.The main objective of this paper is to focus on various perspectives of low power design in VLSI circuits.