Vertical β -Ga 2 O 3 isolated source electrode field effect transistor (ISEFET) without planarization or mid-gap acceptor blocking layers

We propose and demonstrate a vertical β -Ga 2 O 3 transistor architecture without the use of planarization etch back or mid-gap acceptor regions. The isolated source electrode field effect transistor (ISEFET) incorporates a dielectric current blocking layer to access an isolated source pad extending from the top fin metal. The fabricated devices were e-mode with threshold voltage of 2 V, on-off ratio > 10 7 , and had excellent gate modulation characteristics. The ISEFET proved to be suitable for fast prototyping and large-scale manufacturing of future Gallium oxide and other wide bandgap semiconductor devices.