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Ferroelectric vertical gate-all-around field-effect-transistor (Fe-VGAAFET) suits a memory cell with a 5 nm technology node and beyond since it is less constrained by gate length, thereby providing sufficient space for the ferroelectric film compared with ferroelectric FinFET (Fe-FinFET) and ferroelectric lateral gate-all-around field-effect-transistors (Fe-LGAAFET). Also, Fe-VGAAFET achieves multilayer vertical stacking, which further increases the integrated density of devices. Here, we develop ferroelectric vertical sandwich gate-all-around field-effect-transistors (Fe-VSAFETs) with large memory windows (the maximum 2.3 V), high program/erase speeds (100 ns), and excellent retention properties using a self-aligned high-κmetal gate process. Furthermore, vertical nanosheet devices with two channel thicknesses of approximately 16 and 42 nm and nanowire devices with a channel diameter of 30 nm were successfully fabricated, and excellent device characteristics were obtained.
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Huang et al. (2021) studied this question.
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