In the recent years, de-embedding method of -short, and -thru with dummy DUTs are mostly used for on-wafer devices. This paper shows a method, called L-2L, with two metal lines or transmission lines. One is two times the length of the other one. Based on the measurement data of two lines, PAD parasitics and scalable length model with certain width are obtained by L2L. Furthermore, the tape-out DUT numbers for the de-embedding are extremely minimized to 2. The applications for inductors by 65nm Low-K Si-based process and 0.18m FSG Si-based process, and for 0.13m transmission lines are also shown for benchmark in this paper.
No takes yet. Share an insight, caveat, or question.
Yen et al. (2009) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: