An 8b 1-GS/s SAR ADC With Comparison Time Quantizer, Metastability Reduction, and On-Chip Self-Tuning Delay Achieving 47.2-dB SNDR at Nyquist Input

This article presents a 1-GS/s 8-bit SAR ADC incorporating a comparison time quantizer (tcompquantizer) and an on-chip self-tuning delay to mitigate metastability while enhancing resolution and speed. The (tcompquantizer) extracts additional bit information by quantizing the comparator delay, improving resolution without sacrificing speed. The metastability from (tcompquantizer) is also analyzed and effectively suppressed. The self-tuning delay dynamically adjusts time thresholds based on hit ratio detection, ensuring robust operation across process, voltage, and temperature (PVT) variations. Fabricated in 22-nm CMOS, the prototype occupies only 0.0032 mm2and achieves 47.2-dB signal-to-noise-and-distortion ratio (SNDR) at 1 GS/s with a Nyquist input, consuming 4.15 mW. Measurements confirm the effectiveness of metastability suppression, with no metastability observed in2× 10¹¹data points.