Using Model for Assessment of Complementary Metal Oxide Semiconductor Technology and Roadmaps as a Pre-Simulation Program with Integrated Circuit Emphasis Model Generator for Early Technology and Circuit Simulation

In this work, we show how to use the model for assessment of CMOS technology and roadmaps (MASTAR) in order to generate ready-to-use simple pre-simulation program with integrated circuit emphasis (pre-SPICE) data. Calibration of MASTAR on silicon data is shown, as well as prediction of device behaviour due to architectural changes. The generated pre-SPICE parameters are applied to small circuit simulations such as a 10-bit adder, and we show the impact of variability on static random access memory (SRAM) functionality.