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A design concept for memory elements operating via optically and electrically triggered charge separation between organic semiconductor and 1,2-bis(hetaryl)ethene dielectric layers is proposed. These devices demonstrate high programming speeds, exceptionally wide memory windows (≈10 V), high switching coefficients of ≈105 at reasonably low operation voltages (3–10 V), and good write-read-erase cycling stability.
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Frolova et al. (2015) studied this question.
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