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July 22, 2014IEEE Journal of Solid-State Circuits

Low Power Design Techniques for Single-Bit Audio Continuous-Time Delta Sigma ADCs Using FIR Feedback

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Authors

ASAmrith SukumaranSPShanthi PavanAnalog Devices (United States)

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Sukumaran et al. (2014) studied this question.

synapsesocial.com/papers/6aabbf6ee246da4666834ecahttps://doi.org/10.1109/jssc.2014.2332885
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  1. 1A Power Optimized Continuous-Time $\Delta \Sigma $ ADC for Audio Applications2008 · 134 citations
  2. 2A 0.9-V 60-$\mu{\hbox {W}}$ 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range2008 · 168 citations
  3. 3Continuous-Time $\Delta \Sigma $ Modulators With Improved Linearity and Reduced Clock Jitter Sensitivity Using the Switched-Capacitor Return-to-Zero DAC2013 · 30 citations