High-performance 5.2 GHz LNA with on-chip inductorto provide ESD protection

A new ESD protection methodology for high-frequency CMOS LNAs is introduced. An on-chip inductor is employed to drain off the hazardous ESD charge while tuning out the harmful parasitic input capacitance. A 5.2 GHz LNA has been designed, attaining high RF performance while providing a high level of ESD protection.