Oxygen‐Scavenging‐Driven Interlayer Engineering for Balancing Linearity and Retention in IGZO Synaptic Memristors

IGZO‐based memristors exhibit analog synaptic behavior through Schottky barrier modulation, but the trade‐off among update linearity, dynamic range, and retention governed by interlayer design remains unclear. Here, we comparatively investigated Pd/IGZO/SiO 2 /p + ‐Si (Sample #1) and Pd/IGZO/AlO X /Al (Sample #2) memristors with naturally formed interlayers induced by different bottom‐electrode stacks. Sample #1 exhibited a V O ‐rich IGZO layer and soft‐broken SiO 2 interlayer, resulting in larger conductance and superior retention ( τ = 3.9 × 10 4 s). In contrast, the preserved AlO X interlayer in Sample #2 enabled voltage‐division‐assisted linear weight updates ( α P = 1.2, α D = 0.8) while maintaining near‐unity linearity under stronger programming conditions. Neural‐network simulations further revealed a linearity‐retention trade‐off, where Sample #2 showed faster initial learning, whereas Sample #1 achieved higher peak recognition accuracy (92% vs. 88%). These results highlight oxygen‐scavenging‐based interlayer engineering as an effective strategy for balancing linearity and retention in IGZO synaptic memristors.