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June 7, 2018IEEE Transactions on Circuits and Systems I Regular Papers

A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin

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Authors

YCYong ChenPMPui‐In MakCBChirn Chye Boon

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Chen et al. (2018) studied this question.

synapsesocial.com/papers/6aae4db3668337169243c140https://doi.org/10.1109/tcsi.2018.2829725
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