The fully integrated switched capacitor voltage regulator comprises power cells distributed as a ring around the digital area to supply while the MIM capacitors are stacked above. Multiratio cells provide a wide output voltage range from 0.2 to 1.1 V with an input voltage of 1.8 V. A frequency modulation control loop is designed with proportional-integral control. Sampled-data modeling is used to derive the necessary transfer functions to build the control loop. A primarily test chip is fabricated in 28-nm FDSOI technology to evaluate the design. A power density of310 mW/mm2is achieved at 72.5% peak efficiency with a silicon area overhead of 11.5%.Integrated
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Souvignet et al. (2015) studied this question.
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