A digitally controlled oscillator (DCO) is presented that utilizes the non-linearity of a resistor-triode combination in conjunction with a weak latch to mitigate the supply sensitivity of inverter-based delay cells and remain supply noise insensitive over a wide range of supply variation. A proofof-concept prototype for the DCO in 65 nm-CMOS process occupies 90×210 μm2area and consumes 2.25 mW operating over a range of 0.9-1.4 GHz output frequency. At 850 Mv-supply voltage, the frequency pushing of DCO is zero at the optimal point and remains less than 10% over a large excursion of 50 mVpp. When embedded into an all-digital phase locked loop, closed-loop measurements demonstrate that supply noise with 50 mVppmagnitude does not impact the loop dynamics.
No takes yet. Share an insight, caveat, or question.
Yuan et al. (2019) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: