Planar gate 4H-SiC ACCUFETs have been designed, fabricated and characterised, and the highest reported current (>20 A) for this type of device was achieved. A novel channel design to maximise the channel density was implemented. A low specific on-resistance of 15 mΩ-cm2 was obtained on a 9 mm2 device using newly developed N2O anneals on gate oxides. The threshold voltage decreases from 1.5 to 0.9 V, and the extracted channel mobility increases from 18 to 33.6 cm2/V-s as the operating temperature is increased from 30 to 200°C.
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Singh et al. (2003) studied this question.
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