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This paper expounds a three-way Doherty power amplifier (3W-DPA) as a solution to the need for high-efficiency wideband power amplifiers when driven by multi-standard signals. The paper begins with a theoretical analysis of 3W-DPA architecture from which the governing equations are derived. This analysis enables the identification of circuit parameters for maximizing bandwidth. A comprehensive methodology was devised to address the practical design challenges resulting from the transistor nonidealities: nonlinear input capacitance, transistor package, and output capacitance. Based on this methodology, a fully analog 30-W 3W-DPA was designed and implemented using GaN packaged transistors. The 3W-DPA prototype maintained an average drain efficiency of 55% at an output back-off of up to 9 dB, over the frequency range of 0.73-0.98 GHz. The 3W-DPA was successfully linearized when driven with 20-MHz four-carrier wideband code division multiple access (WCMDA) signals. 830- and 900-MHz power-added efficiencies of 47% and 53% was achieved at 32- and 35-dBm average output power, corresponding to a peak-to-average power ratio of 11.7 and 7.14 dB, respectively.
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Golestaneh et al. (2013) studied this question.
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