Practical Layouts and DC-Rail Voltage Clamping Techniques of Z-Source Inverters

The Z-source inverters (ZSIs) have many advantages over the conventional voltage-fed and current-fed inverters, and extensive research works are conducing recently. However, relatively difficult physical layouts of the Z-source networks make them less attractive in the industry applications. A good hardware design is important to handle with the inherent long high-frequency loop in order to avoid generating severe voltage overshoot in the dc-rail voltage of the ZSIs. In this paper, the high-frequency loops in various ZSIs are investigated. A dc-rail voltage clamping technique for magnetically coupled impedance source converters is proposed by using an intuitive circuit modification and addition of a clamping diode. The proposed technique is verified through simulation and experiment.