LO Generation for a 5G Phased Array Transceiver: A High HRR 21–27-GHz Frequency Quadrupler

A 21–27-GHz frequency quadrupler in the 0.13-μm SiGe BiCMOS technology with the 0-dBm output power (POUT) and 40-dBc harmonic rejection ratio (HRR) is presented. A method for load—pull-based output network design is introduced to co-optimize HRR andPOUT; as a result, the design achieves flat and high HRR andPOUTacross 25% bandwidth and a wide input power (PIN) range. This article also discusses the quadrupler’sPOUTand HRR specifications in the context of its integration within a phased-array antenna module (PAAM). We designed two versions of the 64-element wideband 5G phased-array PAAM, one including and one excluding the quadrupler, to demonstrate the minimal impact of the quadrupler on the output spectrum. We also measure the spur performance in dual-polarization mode to evaluate cross-polarization spurs. The spurious emissions acrossPOUTrange of the phased array is better than −20 dBm/MHz, well below the 3GPP 5G FR2 limit of −15 dBm/MHz. The quadrupler design has the highest HRR performance reported among wideband mmWave quadruplers and thoroughly demonstrates, for the first time, the impact of the local oscillator (LO) frequency multiplier on the performance of a wideband phased-array system.