Significant reduction in the soft error susceptibility of GaAs field-effect transistors with a low-temperature grown GaAs buffer layer

The use of a low temperature grown GaAs buffer layer beneath the channel of a metal-semicon- ductor field-effect transistor is shown via computer simulation to reduce ion-induced charge collection by two or more orders of magnitude. This reduction in collected charge is expected to reduce the heavy ion soft error rate by four to seven orders of magnitude in GaAs integrated circuits, and could have significant implications for the applicability of GaAs technology in space-based systems.