A model for optimizing CPU time for proximity correction

Future device technologies will call for the use of very dense and pseudorandom logic patterns. Microfabrication techniques will have to cope with a large number of different designs which are essentially nonrepetitive (e.g., logic). Electron beam technology will also have to be concerned with the large amounts of CPU time it will take to process these designs, especially when considering correction for the scattering of electrons in the resist and substrate (the proximity effect). Proximity correction is divided into the partitioning of design shapes and the dose correction of the resultant shapes. For partitioning, we have evolved a scheme which separates the center from the edges of designed shapes. The centers are given a fixed dose increase of electron exposure to ensure their development and the edges are sent to the proximity correction routine. This will save CPU time for a design which has an abundance of large shape patterns. We have also investigated tradeoffs between the CPU time it takes to set up and solve the set of linear equations for dose correction, and the size of the groups of pattern shapes which are dose corrected at a given time. Since the CPU time needed to solve the matrix of linear equations goes up approximately as the cube of the number of shapes in a group, it is advantageous to know the relationship of group size to total CPU time. For too small groups, the calculations are dominated by overheads incurred in handling the large number of such groups (and their boundaries) comprising the pattern. For large groups, linear equation solution time becomes too large. We develop a polynomial model which chooses the group size for a particular design in order to minimize the total CPU time. Once this is accomplished, the CPU time will become proportional not to a power of ’’N’’ (number of shapes in a chip), but only to ’’N’’ itself.