High-Precision Time Resolution SPAD Array Readout Circuit Based on Event-Driven

This is the authors' abstract. We don't add key points for this paper.

With the rapid advancement of three-dimensional laser ranging imaging technology and the continuous expansion of array scale, more demanding requirements such as stronger anti-interference capability, higher precision, and lower power consumption are imposed on the readout circuit. Nevertheless, with the expansion of the array scale, the transmission of high-frequency clock signals is affected by crosstalk, delay mismatch, and the like, which leads to the degradation of chip performance. To avoid the crosstalk and noise interference caused by the long-distance tracking of high-frequency clock signals in large-scale arrays and to suppress the deterioration of detection accuracy resulting from the initial phase error, a readout circuit based on the built-in clock is designed. Each oscillator is controlled by the voltage control signal generated by the external phase-locked loop of the pixel, considering both the circuit performance and power consumption. Secondly, an event-driven array TDC (time-to-digital converter) circuit is proposed based on the characteristics of single-photon detection application scenarios and the features of the built-in clock array TDC. Based on the trigger condition of the detected return light, the pixel TDC circuit is effectively activated, which can effectively conserve circuit power in sparse photon detection scenarios. Finally, the circuit is taped out based on the TSMC 0.18 μm CMOS process, and the measurement results verify that the proposed GRO(gated ring oscillator) shared array readout circuit operates normally and can achieve a time resolution of 102 ps and a range of 417 ns, with an average power consumption of 0.32 mW per pixel.