28 GHz Doherty Power Amplifier in CMOS SOI With 28% Back-Off PAE

A single-stage, symmetric Doherty power amplifier (PA) in 45 nm CMOS silicon on insulator at 28 GHz is presented. The PA achieves a saturated output power of 22.4 dBm, a peak power added efficiency (PAE) of 40%, and a 6 dB back-off PAE of 28%. High efficiency is attained due to low combiner losses of 0.5 dB, obtained using a recently developed combiner synthesis technique. A compact modeling approach for parasitic-extracted PA transistors is presented, which considerably reduced simulation time. The PA is based on two-stack power devices and occupies overall chip area of only 0.63 mm2, including pads.