A simple time-to-digital converter (TDC), capable of detecting not only phase difference but also frequency difference, is presented. The proposed TDC guarantees pull-in even for PLLs with the lowest loop gain. The TDC is fabricated in a 65 nm CMOS process and dissipates 0.37 mW from a 1.2 V supply at 25 MHz clock frequency.
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Oh et al. (2009) studied this question.
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