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In this work an enhanced electrically erasable programmable read-only memory (EEPROM) device comprised of twin low-temperature poly-Si thin-film transistors (TFTs) was fabricated for potential application to system-on-panel technology. Also, two kinds of memory devices with different overlap areas were developed to investigate the gate-coupling effect. The memory window of 4.8 and can be obtained at a programming voltage of , separately, for the fully overlapped EEPROM and the one with a length overlap between the gate and source/drain. The excellent memory characteristics of the fully overlapped TFT EEPROM cell are attributed to the enhanced gate-coupling ratio by maximizing the overlap coverage between the gate electrode and the source/drain regions.
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Liu et al. (2007) studied this question.
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