We present a clock recovery technique for burst mode systems that performs the functions of clock phase recovery, burst synchronization (to determine the first data bit in the burst), and timing alarm generation (to maintain bursts within their designated time slots). The method is based on the use of a correlation algorithm in which the incoming preamble containing a '0 1 0' bit sequence is sampled with multiple clock phases and correlated with stored, time delayed versions of the same sequence. The method was implemented in a 0.7 /spl mu/m CMOS Application Specific Integrated Circuit (ASIC). Measurements of the phase tracking characteristics over the frequency range of 38 to 90 MHz are presented. Bit error rate measurements made using the device in a burst mode fiber-optic receiver operating at 51.84 Mb/s were also performed, where it was found that the device performed well and was able to perform clock extraction with a penalty of approximately 2 dB with respect to an ideal clock extraction system.>
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Eldering et al. (1994) studied this question.
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