Experimental study reveals stress-dependent hot-carrier degradation in lateral DMOS transistors, highlighting a recessed poly-gate design to mitigate electrical parameter shifts.
The electrical parameters degradations of lateral double-diffused MOS with multiple floating poly-gate field plates under different stress conditions have been investigated experimentally. For the maximum substrate current (Isubmax) stress, the increased interface states at the bird's beak mainly result in an on-resistance (RON) increase at the beginning of the stress, while hot holes injection and trapping into the oxide beneath the edge of real polygate turns out to be the dominating degradation mechanism after around 800-s stress, making the RONdecrease. For the maximum operating gate voltage (Vgmax) stress, the trapped hot electrons in the channel region bring an increase in threshold voltage (Vth) and RON, while the generation of large numbers of interface states at the bird's beak further dramatically increases the RON. A novel device structure with a poly-gate partly recessed into the field oxide has been presented to decrease the hot-carrier-induced degradations.
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Liu et al. (2017) studied this question.
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