Development of indium bumping technology through AZ9260 resist electroplating

Indium bumping is very critical technology in the application of high-density interconnection between a FPA (focal plane array) and a Si ROIC (read-out integrated circuit) by flip-chip bonding. In this paper, the indium BGA (ball grid array) chips are prepared with an electroplating method on the Si substrate. With such a method, the first difficulty arises in removing the seed layer. Two ways, including IBE (ion beam etching) and lift-off, are adopted to overcome it. The results show that the lift-off process is effective but not IBE. During the reflow process, many indium bumps fall off the substrate. Two ways are tried to solve this problem: one is to optimize the reflow profile and the other is to thicken the wetting layer. The results show that these two ways can effectively improve such status. The barrier effects of the UBM (under bump metallization) for indium, which are Ti/Pt (300 Å/200 Å) and Ti/Pt/Au/Ep Au (300 Å/200 Å/1000 Å/4 µm), are also investigated. Experimental results indicate that both of them can be used in application of integration of the FPA and ROIC. Reliability of indium bumps with these two kinds of UBM is evaluated by the shear test. The results show that their shear strength has a significant increase after reflow. For the indium bump with UBM of Ti/Pt/Au/Ep Au (300 Å/200 Å/1000 Å/4 µm), IMC (intermetallic compounds) at the interface of Au–In can strengthen the indium bump but may change the plasticity of indium.