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A mathematical model that simulates the operation of a solid-state bipolar Marx modulator topology, including the influence of parasitic capacitances is presented and discussed as a tool to analyze the circuit behavior and to assist the design engineer to select the semiconductor components and to enhance the operating performance. Simulations show good agreement with experimental results, considering a four stage circuit assembled with 1200 V isolated gate bipolar transistors and diodes, operating at 1000 V dc input voltage and 1-kHz frequency, giving 4 kV and 10-μs output pulses into several resistive loads. Results show that parasitic capacitances between Marx cells to ground can significantly load the solid-state switches, adding new operating circuit conditions.
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Canacsinh et al. (2014) studied this question.
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