Key result
Novel single-lead ECG analog front-end circuit achieves high CMRR of ~114 dB with low noise.
Why the study?
An analog front-end circuit with high input impedance and common-mode rejection ratio is needed for improved single-lead ECG signal acquisition.
The proposed analog front-end circuit demonstrates high input impedance and common-mode rejection ratio, making it suitable for single-lead ECG signal acquisition.
Simulated high-impedance ECG AFE supports prototype development; leaves open hardware validation and clinical translation.
This paper proposes an analog front-end circuit applicable to single-lead ECG signal acquisition based on a 0.18 um process. The circuit employs an AC capacitive coupling instrument amplifier (ACIA) with a DC servo loop, significantly improving input impedance. Simulation results indicate an input reference noise of 8.538 uVrms, an ECG signal voltage amplification factor of 30 V/V to 240 V/V, and an input impedance of 4.59 GΩ @15 Hz. The circuit also features low input noise and a high common-mode rejection ratio of 114 dB.
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Liu et al. (2025) conducted a letter in ECG signal acquisition. Analog front-end circuit with AC capacitive coupling instrument amplifier (ACIA) and DC servo loop vs. Published ECG analog front-ends was evaluated on Circuit performance metrics (input impedance, CMRR, noise, gain). The proposed analog front-end circuit for single-lead ECG signal acquisition achieved an input impedance of 4.59 GΩ, a common-mode rejection ratio of 114 dB, and an input reference noise of 8.538 μVrms.
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