An overview of machine learning methods on microcontrollers and IoT devices in the TinyML paradigm

This article provides an in-depth analytical review of algorithmic strategies and mathematical models for the deep optimi-zation of acoustic and vibration signal recognition systems designed for deployment on autonomous micro-machine learn-ing (TinyML) devices. The fundamental scientific problem addressed is the contradiction between the high computational complexity of modern neural networks and the extreme resource constraints of general-purpose microcontrollers, which typically possess less than 512 KB of RAM and operate within a strict power budget. The study examines the theoretical foundations of feature description generation using quantized window transforms and a recursive mathematical framework for Typicality and Eccentricity Data Analytics (TEDA). This framework enables system state model updates with constant computational complexity O(1)O(1) upon the arrival of each new signal sample. Implementing this approach facilitates a dynamic anomaly window concept, ensuring that neural network classifiers are activated only when statistically significant deviations in the acoustic background are detected, thereby guaranteeing peak energy efficiency for the autonomous node. Particular attention is paid to the analytical clipping algorithm (ACIQ), which minimizes the expected Mean Squared Error (MSE) of quantization by determining optimal thresholds for Laplace distributions. This ensures the preservation of classification accuracy during the transition to 4-bit integer arithmetic without the need for retraining. Furthermore, the work provides a detailed analysis of incremental on-device training mechanisms and selective parameter update strategies using bias-only updates and lite residual modules. It is mathematically proven that such an adaptation architecture reduces peak SRAM requirements by a factor of 6.5 while maintaining high robustness against environmental concept drift. The methodology of system-algorithm co-design is explored, integrating automated neural architecture search (Ti-nyNAS) tailored to rigid hardware limits with a specialized code-generation engine (TinyEngine). This execution environ-ment enables a patch-based inference strategy, eliminating resource deficits in the initial network layers by sequentially processing high-resolution data segments without accumulating full feature maps. Comparative analysis confirms that the proposed integrated approach achieves industrial-level reliability and energy autonomy for intelligent monitoring and se-curity systems.