A High-Precision Current-Limiting Scheme for Current-Mode DC–DC Buck Converter

This is the authors' abstract. We don't add key points for this paper.

Peak current-mode dc–dc buck converters are widely used in the low-to-medium power applications. Although some current-limiting schemes have been proposed to raise current-limiting accuracy, the deviation of current-limiting threshold caused by bandwidth limitation of current-sensing scheme and inherent propagation delay remains unsolved. Targeting on inaccurate current-limiting threshold under various temperatures across a wide range of input voltage, a high-precision current-limiting scheme comprised of improved sampling architecture and fast turn-offstrategy is adopted to attenuate the influence of bandwidth limitation or propagation delay. Besides, proposed sampling architecture with only one constructed current and one comparator is adequate to process the inductor current information precisely to retrench quiescent current and areas. The proposed high-precision current-limiting scheme is implemented in 0.18μm Bipolar-CMOS-DMOS (BCD) process to verify the performance. The experimental results show that the peak efficiency of 95.6% is achieved, while the current-limiting threshold drifts only 4.35% in the temperature ranges from −40 to 125 °C under various input voltage.