A bit‐sliced digital implementation method of the cellular sensor‐computer is proposed. The proposed sensor‐computer architecture is analysed, and an implementation example is introduced. The analogue and the digital implementation methods are compared. It is found that on or below 0.18 µm technology the digital implementation of the cellular sensor‐computer is a viable alternative to the analogue versions in general‐purpose designs.
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Földesy et al. (2006) studied this question.
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