A Chopper Amplifier with Feedforward SAR ADC Assisted DC Servo Loop Achieving ±1V DC Offset Cancellation in 2.1s for Neural Signal Recordings

This paper presents a chopper-stabilized capacitively coupled instrumentation amplifier (CS-CCIA) that achieves large electrode DC offset (EDO) cancellation while featuring a short recovery time and GΩ-level input impedance (Z in). Through analyzing the constraints of noise contribution and recovery time on traditional DC-servo loops (DSL), a feedforward assisted DSL (FFA-DSL) scheme is proposed. By combining a feedforward SAR ADC for coarse EDO cancellation and an analog DSL (ADSL) for residual offset suppression, the FFA-DSL scheme achieves fast recovery from large EDO steps with low noise contribution. A hybrid positive feedback loop (PFL) is proposed to boost the AC Z in and the DC resistance of the CCIA simultaneously. Additionally, a common-mode cancellation loop based on voltage feedback (FB-CMC) is designed to suppress common-mode interference (CMI) without introducing additional capacitive loading at the input. Fabricated in a 0.18-µm CMOS process, the CCIA achieves ±1 Vpp EDO cancellation with a 2.1-s ADSL recovery time after the feedforward path is activated (t rec), while delivering a worst-case total recovery time (t tot) of 4.37 s at a 0.5 Hz high-pass corner frequency. It also provides 1-Vpp CMI tolerance, 2 GΩ Z in at 0.1Hz, and 1.8-µVrms input-referred noise within frequency range of 1 Hz to 200 Hz. It consumes 2.16 µW from a 1.2-V supply.