ReHGNN: A Digital-Analog Processing-in-Memory Architecture for Sparse-Dense Matrix Multiplication in Hypergraph Neural Networks

Resistive random access memory (ReRAM) based analog processing-in-memory (APIM) architectures have been extensively explored for accelerating matrix multiplication in various artificial neural networks (ANNs). However, since the emerging hypergraph neural network (HGNN) generally encompasses large and highly-sparse weight matrices, they usually results in a significant waste of ReRAM resource for zero values when HGNNs are processed with APIM. This paper presents ReHGNN, the first hybrid digital/analog PIM architecture for HGNN inference. We abstract most operations in the aggregation phase of HGNN as sparse-dense matrix multiplication (SpMM), and explore a digital PIM (DPIM) to accelerate these SpMMs. First, we map only non-zero values of sparse matrices to DPIM arrays compactly to minimize the ReRAM resource consumption while improving computational parallelism. Second, we exploit heterogeneous crossbar arrays to accommodate the irregular distribution of sparse matrices. Third, we propose a greedy heuristic algorithm to further improve the utilization of ReRAM resource. Experimental results show that ReHGNN can improve the performance of HGNN inference by a factor of 3.4, 9.2, 15.3, 31.4, 41.3, and improve energy efficiency by a factor of 4.6, 14.1, 17.2, 363.8, and 473.4, compared with ReGNN, ReGraphX, FloatPIM, Hypergef, and GPUs, respectively.