The next generation of hybrid pixel detectors in particle physics experiments require reduced material budget, increased interconnection density and, ideally, they should be tileable to cover large areas seamlessly. These criteria cannot be fulfilled with present day interconnection techniques. As a result the particle physics community has recently put in a lot of effort to investigate and evaluate a variety of novel interconnection technologies. This paper focuses on describing a recently launched Through Silicon Via process development project with CEA-LETI. The project aims to use Medipix3 wafers and an existing ``via last'' TSV process made available by CEA-LETI to demonstrate the feasibility of TSVs on functional detector chips. The status of the project, TSV design and future plans are presented.
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Tick et al. (2011) studied this question.
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