This note surveys seven quantum-computing hardware modalities — superconducting, trapped-ion, neutral-atom, photonic, silicon-spin, colour-centre and Majorana-based topological — with evidence up to 26 September 2026. Superconducting and neutral-atom platforms have reported below-threshold quantum error correction in peer-reviewed papers, and competition is shifting towards logical-gate error, logical-qubit counts and physical-to-logical overhead. No modality leads on every metric: among the cited system-scale processors, trapped ions report the lowest average two-qubit gate error and neutral atoms the largest arrays; superconducting gates are the fastest; silicon spins and photonics bet on manufacturability; and the Majorana-based topological-qubit approach has not yet established Majorana zero modes in its devices. The note also outlines capital and policy (US$12.6 billion invested in quantum-technology start-ups in 2025; DARPA QBI Stage B) and the implications for cryptography: the latest peer-reviewed estimate for solving the 256-bit elliptic-curve discrete logarithm problem on secp256k1 is at most 1,200 logical qubits and 90 million Toffoli gates — far beyond the roughly one hundred low-distance logical qubits demonstrated so far, yet low enough to justify planning post-quantum migration early. The note synthesises published papers, preprints, regulatory filings and primary company sources according to a stated source hierarchy; it reports no independent experiments or measurements.
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Yulin Liu (2026) studied this question.
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