Time-Domain Jitter due to Random Telegraph Noise: An Analysis of the Charge Trapping Impact on the Variability of Oscillators

Charge trapping and de-trapping phenomena are the core mechanism of Random Telegraph Noise (RTN), causing deviations in drain current amplitude over time due to the constant capture and emission processes of charges from the transistor’s channel. As the timing characteristics of oscillators, such as voltage-controlled oscillators and phase-locked loops, depend on the amplitude of the drain current, RTN impacts the stability of periodic signals by inducing variance in the length of the oscillation period (i.e., jitter). In this work, the time-domain jitter (under the concepts of absolute jitter, period jitter, and cycle-to-cycle jitter) induced by RTN in free-running and closed-loop oscillators is estimated. SPICE-level simulations demonstrate that the jitter of CMOS oscillators evolves differently depending on the arrangement of the oscillating structure and its timing behavior. The analysis is validated by straightforward analytical expressions and supported by experimental data from the literature. The relevance of this work lies in presenting a qualitative analysis of the RTN-induced jitter in CMOS oscillators for the characterization and evaluation of circuit design performance and reliability.