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This letter presents an energy-efficient dynamic amplifier. It utilizes source-coupled input boosting and time-domain differential sampling techniques to boost the effective input signal by 4× compared to its floating inverter amplifier (FIA) prototype without noise or power penalties. With discharge-based dynamic biasing, the bandwidth and power of the amplifier can be scaled by 100×. Fabricated in a standard 0.18-μm CMOS technology, the amplifier achieves a state-of-the-art power efficiency factor (PEF) of 0.19, which is 16× better than that of a standard FIA. It also achieves a scalable BW/power range from 0.5kHz/2.3nW to 50kHz/206nW.
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Cheng et al. (2026) studied this question.
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