A 256-Point FFT Using Analog Floating-Point Computation With Post-Silicon Tuning

This article presents a 256-point fast Fourier transform (FFT) processor based on an analog floating-point computation framework. A novel floating-point analog multiply-and-accumulate (FP-AMAC) unit encodes mantissas as pulse widths with a 4-bit digital exponent and operates through integrate, pulse, and reset stages with accuracy enhancements, including node pre-charge and comparator delay compensation. Implemented in 22-nm CMOS, the processor achieves 0.71–1.13nJ/FFT at 1.53–1.94 GS/s, with a measured worst case output SNR of 31.37 dB, corresponding to a 12.3-bit fixed-point digital FFT. Post-silicon coarse-fine tuning and interpolation techniques ensure robust accuracy across process, voltage, and temperature (PVT) variations.