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Accurate evaluation of charge extraction remains a critical challenge in lead sulfide (PbS) quantum dot (QD) solar cells, where interfacial transport barriers can obscure intrinsic device performance. Here we show that the processing of poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS) hole transport layers introduces a transport barrier that is not visible in a current–voltage (J–V) measurement alone and is exposed only by cross-validating against external quantum efficiency (EQE). As-deposited interlayers inflate the J–V-derived short-circuit current density while suppressing the EQE response, with a deviation of more than 30% that leads to an overestimate of photocurrent generation. Intensity-dependent measurements confirm the mechanism directly: photocurrent collection in the as-deposited device is superlinear in illumination intensity, whereas the reference and annealed devices are linear. Thermal annealing at 90 °C removes the barrier, restores agreement between the two techniques and yields a short-circuit current density of 29.4 mA cm−2, approximately 82% of the detailed balance limit for the PbS bandgap. Atomic force microscopy and lateral conductivity measurements show that annealing densifies the interlayer, reducing its thickness by 17% and doubling its conductivity, and a controlled rehydration experiment shows that this change is not reversed by re-exposure to humid air. Photoelectron spectroscopy confirms the favorable valence band alignment that makes the interlayer useful. Beyond the performance gain, this work shows how processing-dependent interfacial transport governs both device operation and measurement fidelity, and provides practical guidelines for reliable characterization and interface design in high-current-density quantum dot photovoltaics.
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Yi et al. (2026) studied this question.
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