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Purpose of research. The widespread use of precision pulse generators in electronic equipment testing systems requires ensuring accurate synchronization of the generated sequence with external events. This paper investigates a phase synchronization method for clock pulses by an external trigger pulse proposed by the authors. The method is based on storing the current position of the clock pulse edge in a multi-tap delay line using switch-controlling flip-flops that determine the delay value of the clock sequence. A key feature of the method is the rapid locking of subsequent changes in the flip-flops' states by a feedback signal. The paper evaluates the degree of influence that the delay variation of flip-flops and locking logic has on the synchronization time and phase-locking accuracy. Methods. The assessment of the factors' influence was conducted through computer simulation of the device's logical structure and experimental validation of the proposed solution on a prototype. Results. It is shown that the proposed method for latching the clock sequence pulse edge closest to the sync pulse at one of the multi-tap delay line outputs, combined with an asynchronous circuit for blocking subsequent state changes of J-K flip-flops, eliminates additional synchronization circuits and their delays. This reduces the synchronization time and contributes to increasing the maximum repetition frequency of external trigger pulses. At the same time, the jitter of the first clock pulse of the synchronized sequence is determined by the delay of a single section of the multi-tap delay line, which in the limiting case is restricted only by the flip-flop delay variation during a synchronous reset and the propagation delay variation of the switch. Conclusion. The proposed solution enhances the external-trigger operating frequency and phase-locking accuracy without requiring high-speed components. Thus, it can be recommended for new precision pulse generator designs.
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Bondar et al. (2026) studied this question.
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